1. Field of the Invention
The present invention relates to semiconductor devices, and, more particularly, to semiconductor devices having a body contact and methods of forming the same.
2. Description of the Related Art
As channel lengths of MOS (metal-oxide-semiconductor) transistor devices decrease, certain secondary effects, known as short channel effects, may decrease the performance of the devices. In a MOS transistor formed on an SOI (silicon on insulator) substrate, short channel effects may be suppressed due to full or partial depletion of the channel region. However, one drawback of SOI devices may be the accumulation of electrical charges in the body of the device. Such charge accumulation may increase the potential of the body region, which may result in a parasitic bipolar effect and/or a floating body effect such as the so-called kink phenomenon. The floating body effect may occur in an MOS transistor formed on an SOI substrate as well as in a thin film transistor having an isolated body.
By applying a bias to the body region of a transistor, electrical charges may be emitted from the body region, which may help to suppress the floating body effect. According to some conventional methods, the floating body effect may be suppressed by applying a body bias to a contact tied to both the gate and the body. Such a device may exhibit a lower threshold voltage when the transistor is turned on. Thus, the power consumption of the transistor may be reduced, and the transistor may operate at a higher switching speed.
A transistor having a body contact structure formed on an SOI substrate is disclosed in Tech. Dig., 2003 IEDM entitled “IMPACT OF ACTIVELY BODY-BIAS CONTROLLED (ABC) SOI SRAM BY USING DIRECT BODY CONTACT TECHNOLOGY FOR LOW-VOLTAGE APPLICATION” by Yuuichi Hirano et al.
A conventional semiconductor device 10 having a gate-body contact 40 is illustrated in FIG. 1. A body region 34 defined by a full trench isolation layer 36f and a partial trench isolation layer 36p is formed on a substrate 30 on which a buried insulation layer 32 is formed. Gate patterns 38a and 38b are formed to cross over the body region 34. A gate-body contact 40 is connected to the body region 34 through the partial trench isolation layer 36p. Thus, the electric potential of the body region 34 is controlled by contacting a portion of the body region 34 below the partial trench isolation layer 36p. When the device is turned off, charges accumulated in the body region 34 may be emitted via the gate-body contact 40. Since the electric potential of the body rises only when the device is turned on, the threshold voltage may drop, thereby reducing the stand-by current while shortening the device access time. Unfortunately, the process used to manufacture such a device may be complex.
Additionally, if the body region 34 and the gate pattern 38a are misaligned, the body region 34 may be exposed, which may result in the formation of an unwanted short circuit between the source and/or drain of the device and the body region 34.